The present invention relates to frequency sources utilizing a phase-locked loop and more particularly to automatic frequency stabilization providing low-noise and low power consumption.
Frequency sources stabilized by a phase-locked loop are used in a wide variety of applications. One of the many applications is in a transceiver in a wireless telephone.
It is desired to increasingly miniaturize circuitry. It is important to provide a design wherein different stages of a stabilized frequency source, for example a local oscillator and digital counters, can be integrated onto one integrated circuit chip. For improved battery life, it is important to provide a circuit which will draw less current in comparison to prior art circuits. In communications as in many other applications, it is also desired to reduce spurious noise.
Analog phase-locked loop circuits utilize a voltage controlled oscillator (VCO) as a clock source. Closed loop phase and frequency control are provided to stabilize the VCO output frequency. The phase-locked loop maintains closed loop control. However, the phase-locked loop has a limited dynamic range. For example, the phase-locked loop may compensate for frequency variations in the source on the order of a few percent. However, if expensive manufacturing techniques are to be avoided in the construction of the VCO, VCOs will have an initial free running frequency that can vary significantly from the desired operating value. For this reason, digital counters are utilized in closed loop frequency control in conjunction with the phase-locked loop. Circuits including the digital counters in a frequency control loop reduce error in the VCO output frequency error to a sufficiently low level that the phase-locked loop is capable of maintaining the correct VCO frequency.
Digital counters have the capacity to produce different forms of spurious noise. The spurious noise can be coupled to the output of the VCO. The problem is magnified since, in recent years, more functions have been integrated into fewer and smaller integrated circuit chips. Having VCO and phase-locked loops on a single integrated circuit chip increases the potential for noise to enter the output. The frequency control loop digital counter draws current as well. It is highly desirable to minimize power requirements for operating the digital counter.
Briefly stated, in accordance with the present invention, there is provided a phase-locked loop circuit including one loop for regulating phase of a VCO with respect to a reference source. In another loop, VCO frequency is compared to frequency of a crystal oscillator. Digital counters divide the frequency of the crystal oscillator and VCO to a common reference frequency. Once the frequency loop is locked, the counter at the output of the crystal oscillator is bypassed. The counter is bypassed by a flip-flop circuit clocked by the crystal oscillator and receiving a scaled input from the VCO. While the VCO frequency error is in the frequency range of correction capability of the phase-locked loop, the output of the flip-flop will duplicate the output of the counter. Thus, the counter can be bypassed and shut off.